Four Consumer Electronics Design Challenges, and Solutions, To Consider Before You Design

Consumer electronics are still at the top of shoppers’ lists when it comes to spending extra cash.

At the present time, the consumer electronics market is valued at $724.97 billion with sales forecasted to grow to $1.25 trillion by the end of 2033. Experts say this is because of a growing demand for smartphones, televisions, home appliances, and rising disposable income.

Electronics have become an integral part of modern lifestyles with consumers pushing manufacturers for more advanced technologies and innovative features for devices like smartphones, laptops, tablets, TVs, cameras, gaming consoles, and wearables. Shoppers are looking for smart connected devices, artificial intelligence (AI) integration, augmented and virtual reality (AR/VR), and 5G connectivity.

Fig. 1. In demand consumer electronics.

“Today’s electronics are getting smaller, faster, and cheaper which are all fantastic for the consumer,” EMA Principal Scientist I Karen Burnham says. “It’s a challenge for the product designer, however. Higher speeds mean that smaller and smaller elements, particularly on PCBs (printed circuit boards), can receive or transmit unintentional noise to neighbors.”

Challenges of advancing technology for consumer electronics include:

  • ESD threats
  • Radiated emissions
  • Crosstalk EMI
  • PCB design

A product can do to market provided that it meets electromagnetic compatibility (EMC) standards, which is when a device functions in its electromagnetic (EM) environment without introducing intolerable disturbances. Standards define terms, rules, and test methods for achieving EMC as well as specifying limits and minimum test levels for electric and EM emissions and immunity of electronic products.

“The situation you never want to be in is to be very close to launch and find out that either your product fails a regulatory test, or it has an unforeseen performance issue caused by self-interference,” Burnham says. “Early testing and simulation are key for avoiding unpleasant surprises late in the design process.”

Challenge #1: ESD Threats

Humans are the biggest threat to electronics when it comes to ESD. The danger comes from the sudden and momentary flow of electric current between differently charged sources when they are close together. For example, the process is similar to getting ‘shocked’ after rubbing your feet on the carpet. In this case it is between the device and the user.

A second source of ESD is charged cabling. Cables develop a charge from installation, moving air, or people holding the device and walking across the floor. Electrostatic charges can remain in a device for a long time if they are not grounded, especially in dry conditions.

ESD events can create internal damage that leads to a shortened lifespan and premature failure of the device. Circuit boards are especially susceptible to ESD since they contain numerous soldered contact points.

A full wave solver is needed to simulate ESD threats in designs. The transient nature of the discharge creates problems for frequency domain simulation methods. Another modeling challenge is coupling to cables that often involve braids with sub-millimeter filaments.

Example of ESD geometry.

Fig 2. Example of ESD geometry.

Challenge #2: Radiated Emissions

Radiated emissions are the unintentional emissions or noise from electronic devices which have the potential to interfere with other devices. This creates the potential for device malfunctions, safety risks, data loss, or inaccurate readings. Radiated emissions have several causes including using miniature and compact electronic circuit designs, antennas, and having multiple devices on the same frequency band.

Reducing radiated emissions from circuits and cables is possible by using shielding, EMI filtering, proper cabling and wiring, and grounding and bonding.

Testing creates a new set of challenges because test failures may not always reveal the cause, it occurs late in the development cycle, and radiated emission limits occur across a broad frequency range. If using simulation, frequency space must be very small to predict all potential peaks, and modeling entire unit enclosures is complex and expensive using legacy methods.


Challenge #3: Crosstalk EMI

When signals from one circuit or transmission line interfere with adjacent components you get crosstalk. Each piece generates EM fields and when they are in close quarters the EM fields overlap. Crosstalk degrades signal quality and can take place in electronic systems including PCBs, integrated circuits (ICs), and communication cables.

Crosstalk is a complex problem because it typically involves unwanted coupling between digital, analog, and radio frequency (RF) blocks. Mitigation techniques include minimizing width among traces, keeping traces on adjacent layers perpendicular, using ground planes, and using differential signals. Designers may also utilize advanced materials to reduce EMI such as absorbing tapes, foams, tiles, and Ferrous chokes.

Some of these essential materials may be frequency dependent and waiting to test these materials could lead to delays if they don’t meet standards. They are also expensive, so it is best to predict their necessity early in the design process.

Fig. 4. EMI crosstalk prediction in Ansys EMC Plus.

Challenge #4: PCB Design 

A PCB connects the electronic components in a product in an organized manner and are generally made of a laminate, such as fiberglass or epoxy, and layers of copper circuitry. Making electronics affordable sometimes means making changes that increase potential problems.

“Keeping costs down can mean things like minimizing the part count on the BOM (bill of materials) or cutting the number of layers in a PCB stack up, things which can increase coupling/ interference problems and decrease the parts and space available for filtering,” Burnham said.

EMI inside a PCB is commonly from an internal source that results in incompatible signals interfering with one another causing the board to fail. Typically, these EMI sources come from design flaws in the traces, circuits, vias, PCB coils, and other elements. Ways to prevent and fix these problems include PCB grounding, trace layout, component arrangement, and adding physical shielding. Additionally, it is also important for designers to think about high frequency noise traveling around the boards.

“When those signals aren’t accounted for, they’re the most likely thing that can cause EMC problems,” Burnham says. “When they aren’t controlled, they’re unpredictable, sometimes they cause problems and sometimes they don’t. In theory, high fidelity PCB modeling can let you know if you’re likely to have problems in a more refined way than simple injunctions to follow extremely conservative EMC best practices or design rules.”

Solution: Simulation with Ansys EMC Plus

Be confident that your designs will pass EMC testing the first time by using Ansys EMC Plus.

EMC Plus is a platform level EM modeling and simulation tool that delivers design-to-validation workflow for EMC. Application areas include EM environmental effects (E3), full-vehicles with cables, EMI/EMC in full-devices, and RF de-sense in devices.

“EMC Plus is especially strong and fast at determining the interactions of cabling with all kinds of stimuli: noise coming from PCBs or picked up from neighboring systems, or induced by exterior environments,” Burnham says. “These cable interactions are key in the frequency ranges 150 kHz- 30MHz and 30 MHz to 1 GHz which are absolutely key in different regulatory compliance limits.”

Save time and money by using EMC Plus and simulating early. Simulation helps to remove unnecessary mitigations and reduces risk going into EMC testing. Here is how the software works to solve four different problems.

How it works.

How EMC Plus supports ESD product design:

  • It is a full-wave solver in the time domain, which is genreally well-suited for transients such as ESD.
  • Specify non-contact ESD arcing to the device to determine where the arc will attach and predict the voltage induced on nearby components.
  • Includes co-simulation with a wire simulation code that allows for the considerations for small conductors, braided shields, and thin foils.

Fig 6. ESD example in Ansys EMC Plus.

How EMC Plus supports radiated emissions product design:

  • Quick and easy PCB import of near-field emissions from SIwave, HFSS, and other tools.
  • Simulate emissions with small frequency steps in a wide range at once.
  • Automatic postprocessing of data to compare limits.

How EMC plus supports crosstalk EMI evaluation:

  • Assign frequency dependent material properties based on user-defined characterization.
  • Fits user-defined properties with curves suitable to specify in a time-domain simulation.
  • Advanced thin material algorithms allow complex materials to be specified in complex products with minimal analyst effort.

How EMC Plus supports PCB design:

  • Sub-grid meshing of geometry streamlines analysis of coupling to and from PCBs.
  • Easy import of PCB models using SIwave or HFSS that contain enclosures, cables, and other complex structures.
  • Thin material algorithm accurately captures the shielding effects of a wide range of materials with minimal geometric manipulation.

“Any tool that lets you solve problems early in the process when they’re easy to address, instead of having to engage in panic-inducing troubleshooting right before launch, is something companies should investigate and consider investing in,” Burnham says.

EMA maintains EMC Plus. Ansys is the exclusive seller. Start simulating your devices now by clicking here.